In many high voltage circuit applications, before providing an input signal to an internal circuit component consisting of low voltage transistors, a pass gate circuit component is cascaded in an input stage of the circuits to limit the amplitude of the input signal. The pass gate circuit component can protect the low voltage transistors in the internal circuit from breakdown due to an accidental high voltage, which improves the stability of the high voltage circuits.
FIG. 1 shows a conventional pass gate circuit 10. As shown in FIG. 1, the pass gate circuit 10 comprises a DMOS transistor 11 coupled between an input node 12 and an intermediate node 13 of an internal Schmitt trigger 14. A gate of the DMOS transistor 11 is coupled to receive a supply voltage Vsup. However, when passing an input signal Vin, received at the input node 12 to the intermediate node 13, an intermediate voltage Vim at the intermediate node 13 may experience a threshold voltage loss, because the DMOS transistor 11 is turned on only when its gate-to-source voltage is higher than its threshold voltage Vth. Therefore, the maximum amplitude of the intermediate voltage Vim equals to the supply voltage Vsup minus the threshold voltage Vth. As the threshold voltage Vth for the DMOS transistor 11 is generally higher than 1 volt, the range of the intermediate voltage Vim provided by the pass gate circuit 10 is significantly decreased.
FIG. 2 shows another conventional pass gate circuit 20. As shown in FIG. 2, the pass gate circuit 20 comprises a DMOS transistor 21 and a resistive divider with a first resistor 22 and a second resistor 23. The first resistor 22 is coupled between an input node 24 and a drain of the DMOS transistor 21, and the second resistor 23 is coupled between a source of the DMOS transistor 21 and the ground. An intermediate voltage Vim is provided to an internal Schmitt trigger 25 at the source of the DMOS transistor 21. However, the resistive divider may introduce additional sensing error into the circuit 20 due to the first resistor 22. In some cases, a pull up current cannot be applied to the pass gate circuit 20 as the second resistor 23 introduces a pull-down current path from the source of the DMOS transistor 21 to the ground.